FDDI System Level Description The FDDI system, how it
works, and the role of the individual components. EK-DFDDI-CG-01
Fiber Distributed Data Interface Network Configuration
Guidelines for connecting devices to an FDDI network,
plus network configuration examples.
• A Primer on FDDI: Fiber Distributed Data Interface
(EC-H1580-42/92 07, Version 2.0)
This manual describes the features, topologies, and
components of the FDDI LAN standard.
ADRS E24, 25
J3 Unk J4 Port A -
UTP (called MJ by DEC) T1 Pulse
PE-68517 T2, 3 TDK
ZJYS-2 Y1 50.0000
The major components on the adapter are as follows:
• 1 megabyte of packet memory
• 68000 onboard processor
• DMA control
• 32-bit, 33 MHz PCI bus interface
• FDDI interface chipset
• IEEE address ROM
• Onboard, nonvolatile memory for firmware storage
DC amps @ +5.0 V, 1.1 A -
DC amps @ +12.0 V, 0.1 A (maximum)
Bus loading - per PCI standard, Revision 2.0
connection in progress (or no cable attached)
after system boots, indicates port or Link
Confidence Test (LCT) failure; retry loop
If on before system boots, indicates self-test
and DEFPA-MA only)
disabled by management or LED or adapter fails
1. Turn on power to the computer and observe the PHY LED.
2. Note the following events (within 10 seconds after the
computer power is turned on):
a. The PHY LED flashes green (three flashes)
for approximately 1 second.
b. The PHY LED turns off when the adapter
passes the powerup self-test.
A steady amber LED
indicates a powerup self-test failure.