@8f6a.adf  IBM Ethernet Quad-B2 PeerMaster (BNC) 
C8f6a.adf  ADP for B2 

@8f6d.adf  IBM Ethernet Quad-BT PeerMaster (RJ45) 
C8f6d.adf  ADP for BT 

Peermaster MCA for OS2, NW, Netfinity and NT   Drivers, utils 
194-358 Ethernet Quad Peermaster Adapter
Installation Manual 

ADF Sections
LED Indications

NT 4.0 configuration utility- Supports Traditional and VNET 
   Do not install a PeerMaster adapter in slot 4 of a Model 85 or 95 server.  Pressure resulting from contact with foam mounted to the side panel might result in damage to the adapter or computer. 
   Ed. You can only use Slot 2, 3, and 4 for form factor 5 cards (eg. RS6K cards). AND you cannot put two RS6K form factor cards next to each other (cooling). So you are limited to Slot 2 and Slot 4.

Peermaster QuadEthernet Adapter BT and B2
D5 Diagnostic Error LED
J1-4 BNC or TP ports
J5 Damned if I know.
U2-5 Intel KU82596CA-25
U10 06H6692 Flash
U20 Intel KU80960CF-25
U23  34G1521 (Miami module)
U29 40.0000 MHz osc 
U31 Intel N82C54-2
U34 Xilinx XC3142A-3
U36,37,69,70 TC5588128J-15
U54-57 Intel 82503
U62 25.0000 MHz osc
U63 72 pin SIMM

D5  LED is normally off prior to adapter download, and normally on after successful download. 
U63   DRAM is an industry standard SIMM up to 16MB 

82503 Dual Serial Transceiver (DST) 
   The 82503 includes on-chip AUI and TPE drivers and receivers 82593, and 82596). This component incorporates six LED drivers to display transmit data, receive data, collision, link integrity, polarity faults and port selections, allowing for complete network monitoring by the user. The transmit, receive and collision LEDs indicate the rate of activity by the frequency of flashing.

82C54 CHMOS Programmable Interval Timer
   Three independent 16-bit counters, each capable of handling clock inputs up to 10 MHz. All modes are software programmable. The 82C54 is pin compatible with the HMOS 8254, and is a superset of the 8253. Six programmable timer modes allow the 82C54 to be used as an event counter, elapsed time indicator, programmable one-shot, and in many other applications. 

82596CA High-Performance 32-Bit Local Area Network Coprocessor 

   PeerMaster adapters employ a "deep" design (each adapter has its own processor), enabling the adapters to off-load selected LAN functions from the server processor.  The PeerMaster attaches to the MC bus with the "Miami" module, which supports 80MB/sec data-streaming mode and peer-to-peer data transfers across the MC.  The advanced channel interface enables 64-bit wide data transfers direct from adapter to adapter, with a performance improvement up to four times that of currently available Ethernet adapter alternatives. 

What is the card edge connector for? 

From Peter 
>Will this adapter work with Windows 95? 
No. All 4 adapters share 1 interrupt. 

>And will this device take the place of an external hub? 
No. It is a "4 single adapters on one card" ... not a hub. 

   The Quad-BT or -B2 PeerMaster provides the ability to connect your server to four separate 10Mbps Ethernet LAN segments.

These adapters support: 
  40MB/sec data transfers between host PC and adapter 
  64-bit wide data transfers among ports on an adapter 
 80MB/sec data transfers among ports across multiple adapters with no host processor intervention 
 High performance means to forward cross-segment traffic without impacting server performance 
   64-bit data transfers across the Micro Channel at burst rates of 640Mbps, which equals the total bandwidth of 64 Ethernet ports (Only IF you have a 500 class system with six Peermasters!)

AdapterId 08F6AH IBM Ethernet Quad-BT PeerMaster (RJ45)
AdapterId 08F6DH IBM Ethernet Quad-B2 PeerMaster (B2)

Device I/O Address
   The system bus I/O address of the adapter. 
  <1C00H-1C1FH>, 3C00H-3C1FH, 5C00H-5C1FH, 7C00H-7C1FH, 9C00H-9C1FH, BC00H-BC1FH, DC00H-DC1FH, FC00H-FC1FH 

Interrupt Level
   The prioritized interrupt request line on which the adapter interrupts the system. The interrupt level may be shared with another adapter. The highest to lowest interrupt priorities are: 
  <Level 3>, 4, 5 

Primary Arbitration Level
   Primary arbitration level for bus master direct memory access (DMA) transfers. An arbitration level of 1 has the highest priority; increasing levels have corresponding decreased priority. 
  <Level E>, D, C, B, A, 9, 8, 7, 6, 5, 4, 3, 2, 1 

Streaming Data
   Enables or disables the Streaming Data feature of the adapter as both a bus master and a slave. Disable causes the adapter to use the basic data transfer procedures. Streaming data procedure is supported when enabled. 
  <Disabled>, Enabled 

Selected Feedback Return
   Checks for and reports loss of selected feedback return by the bus master of the adapter. 
  <Disabled>, Enabled 

Address and Data Parity
   Enables or disables the address and data parity checking and generation by the adapter. 
  <Disabled>, Enabled 

First Shared Storage Window Location
   There are two independent windows into the random access memory (RAM) on the adapter. This is the first window that is located in the read-only memory (ROM) or RAM area. This window is  either 8KB or 16KB 
8K Window
DE000H-DFFFFH:  8KB Window
DC000H-DDFFFH:  8KB Window
DA000H-DBFFFH:  8KB Window
D8000H-D9FFFH:  8KB Window
D6000H-D7FFFH:  8KB Window
D4000H-D5FFFH:  8KB Window
D2000H-D3FFFH:  8KB Window
D0000H-D1FFFH:  8KB Window
CE000H-CFFFFH:  8KB Window
CC000H-CDFFFH:  8KB Window
CA000H-CBFFFH:  8KB Window
C8000H-C9FFFH:  8KB Window
C6000H-C7FFFH:  8KB Window
8K Window
C4000H-C5FFFH:  8KB Window
C2000H-C3FFFH:  8KB Window
C0000H-C1FFFH:  8KB Window 

16K Window
DC000H-DFFFFH:  16KB Window
D8000H-DBFFFH:  16KB Window
D4000H-D7FFFH:  16KB Window
D0000H-D3FFFH:  16KB Window
CC000H-CFFFFH:  16KB Window
C8000H-CBFFFH:  16KB Window
C4000H-C7FFFH:  16KB Window
C0000H-C3FFFH:  16KB Window

Note:  The second window is used for peer data transfers. The setup program automatically selects this window above the 1MB boundary in Micro Channel address space. For Model 85 setup instructions, see “Special Instructions for Model 85” below 

Special Instructions for Model 85
   To provide for peer data transfers, Quad PeerMaster adapters support a system bus window into their local memory. The location of this window is normally selected, verified, and reserved by the automatic configuration program during the adapter installation process. Due to limitations of the setup program provided on some IBM Model 85 servers, however, this window is not reserved by the automatic configuration program. Instead, the device driver provides a default window location for each installed Quad PeerMaster adapter. The default window location of each installed adapter is based upon the expansion slot of the adapter in the following manner: 
   Conflicts cannot be detected and resolved by the device driver. Use the setup program on your system to manually verify that conflicts do not exist with the default window locations. You may override the default window locations to resolve possible conflicts. The MEMORY keyword allows you to override the default values. This keyword specifies a system bus address for the adapter window base, as follows: 

   N specifies a window base address in MB. Thus, a value of 100 meanss a base address of 100MB. Minimum value of  4, Maximum value of  255 
Slot Number
Default Window 

LED Indications
 LED Indication 
.5s On/.5s Off. Continuous.
DRAM Failure.  DRAM missing or loose.
Insert/reseat memory and try again. 
.5s On/.5s Off   3 Flashes, stays off
POST Failure
Run diagnostics to get exact error and recommended action. 
.5s On/.5s Off   5 Flashes, stays off.
Flash Checksum Failure
Replace Flash with programmed  part.

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